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Akarshan BiswasandGitHub b3c9a65673 SYCL: set extras only on GGML_TYPE_Q4_0 (#12366) 
* SYCL: set extras only on GGML_TYPE_Q4_0

* release tensor_extras in reset buffer interface
 2025-03-17 09:45:12 +08:00
Akarshan BiswasandGitHub 5e43f104cc SYCL: Disable f16 Unary OPs as not supported by the kernels (#12201) 2025-03-05 16:58:23 +01:00
Akarshan BiswasandGitHub ece9745bb8 SYCL: Move CPY kernels to a separate file and add few missing kernels (#12133) 
* SYCL: refactor and move cpy kernels to a separate file

* Add few missing cpy kernels

* refactor and add debug logs
 2025-03-03 11:07:22 +01:00