 Neo ZhangandGitHub
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53dc8b59bf
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sycl : fix wrong variable check by assert (#20903)
* fix wrong variable check by assert
* use GGML api
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2026-03-25 11:48:37 +02:00 |
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Neo ZhangandGitHub
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f40a80b4f3
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support bf16 and quantized type (#20803)
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2026-03-22 22:06:27 +08:00 |
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Neo ZhangandGitHub
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b6c83aad55
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[SYCL] ehance UPSCALE to support all UT cases (#20637)
* [SYCL] ehance UPSCALE to support more cases
* rm test case result of SYCL1
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2026-03-17 10:01:52 +08:00 |
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Neo ZhangandGitHub
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a93c0ef0fa
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add op gated_delta_net (#20455)
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2026-03-14 22:01:57 +08:00 |
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Neo ZhangandGitHub
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ecac98ee53
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[SYCL] Update SYCL.md for binary package for Windows (#20401)
* add download binary package
* update prefix
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2026-03-11 22:21:22 +08:00 |
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Neo ZhangandGitHub
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0cec84f999
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fix op rope, add rope_back (#20293)
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2026-03-11 09:53:34 +08:00 |
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Neo ZhangandGitHub
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b2e1427c9b
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fix for failed UT case: ACC, L2_NORM, UPSCALE, fused_glu, unary (#20283)
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2026-03-11 09:53:05 +08:00 |
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Neo ZhangandGitHub
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213c4a0b81
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[SYCL] supprt Flash Attention for fp32/fp16/Q4/Q5/Q8 (#20190)
* support flash-attention for fp32/fp16/Q4/Q5/Q8
* rm warining
* update for JIT
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2026-03-08 12:00:07 +08:00 |
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c17dce4f5c
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replace the magic nunber 768 by max work group size to support iGPU (#19920)
Co-authored-by: Neo Zhang Jianyu <jianyu.zhang@intel.com>
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2026-02-27 09:26:07 +08:00 |
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2943210c1e
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support permuted, remove check s0/s10 (#19889)
Co-authored-by: Neo Zhang Jianyu <jianyu.zhang@intel.com>
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2026-02-26 10:27:20 +08:00 |
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Neo ZhangandGitHub
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bf38346d13
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Remove support for Nvidia & AMD GPU, because the oneAPI plugin for Nvidia & AMD GPU is unavailable: download/installation channels are out of work. (#19246)
User can't build up the software for Nvidia & AMD GPU.
rm the oneMath since it is only used in NV and AMD code path.
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2026-02-02 21:06:21 +08:00 |
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Neo ZhangandGitHub
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2634ed207a
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create test.sh to enhance the parameters for testing, update the guide, rm useless script (#19243)
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2026-02-01 18:24:00 +08:00 |
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d4964a7c66
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sycl: fix norm kernels: l2_norm, group_norm, rms_norm by remove assert to support more cases (#19154)
Co-authored-by: Neo Zhang Jianyu <jianyu.zhang@intel.com>
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2026-01-29 09:20:22 +08:00 |
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cb6caca191
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[SYCL] use malloc to support both iGPU and dGPU in same time (#18992)
* use malloc to support both iGPU and dGPU in same time
* support windows
---------
Co-authored-by: Neo Zhang Jianyu <jianyu.zhang@intel.com>
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2026-01-23 20:54:10 +08:00 |
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a6a552e4ec
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[SYCL] replace llama-cli by llama-completion to rm the impact to test script (#18290)
* replace llama-cli by llama-completion to rm the impact to test script
* Update examples/sycl/run-llama2.sh
Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com>
* Update examples/sycl/run-llama2.sh
Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com>
* Update examples/sycl/run-llama3.sh
Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com>
* Update examples/sycl/run-llama3.sh
Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com>
* Update examples/sycl/win-run-llama2.bat
Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com>
* Update examples/sycl/win-run-llama3.bat
Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com>
---------
Co-authored-by: Neo Zhang Jianyu <jianyu.zhang@intel.com>
Co-authored-by: Sigbjørn Skjæret <sigbjorn.skjaeret@scala.com>
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2025-12-23 12:59:12 +08:00 |
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Neo ZhangandGitHub
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68522c678d
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ci : support bfloat16 SYCL release package (#17855)
* support bfloat16 release package
* add fallback file
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2025-12-08 15:09:39 +01:00 |
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7d2add51d8
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sycl : support to malloc memory on device more than 4GB, update the doc and script (#17566)
Co-authored-by: Neo Zhang Jianyu <jianyu.zhang@intel.com>
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2025-11-29 14:59:44 +02:00 |
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a21c6fd450
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update guide (#8909)
Co-authored-by: Neo Zhang <>
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2024-08-11 14:07:43 +05:30 |
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Neo ZhangandGitHub
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d4ff847153
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[SYCL] correct cmd name (#8877)
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2024-08-06 09:09:12 +08:00 |
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Neo ZhangandGitHub
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df68d4fa5d
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[SYCL] Update README-sycl.md for Chapter "Recommended release" and "News" (#7946)
* Update README-sycl.md
* Update README-sycl.md
* Update README-sycl.md
* Update README-sycl.md
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2024-06-17 11:17:07 +08:00 |
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