ggml-hexagon: add hex_supported_buffer for better buffer supported check (#17212)
* hexagon: add buffer support checks for hexagon sessions * refactor: simplify buffer support checks in hexagon operations * hexagon: update buffer support checks to use tensor structure * refactor: streamline buffer initialization for DSP queue in hexagon operations * refactor: simplify buffer initialization in DSP queue for hexagon operations * refactor: optimize hex_supported_buffer function by fold expression * wip * refactor: simplify dspqueue_buffers_init function and its usage in hexagon operations * fix: improve nan handling at hvx_vec_fast_sigmoid_fp32_guard * refactor: optimize hvx_vec_inverse_fp32_guard for better nan handling * refactor: update hvx_vec_fast_sigmoid_fp32_guard to use adjusted exponent limits * refactor: modify hvx_vec_fast_sigmoid_fp32_guard to accept parameters for improved flexibility * refactor: update hvx_vec_exp_fp32_guard to accept max_exp and inf parameters to save some instructions * refactor: move hvx_vec_inverse_fp32_guard implementation to hvx-inverse.c for better perf
This commit is contained in:
@@ -16,13 +16,8 @@
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#include "hvx-utils.h"
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#include "ops-utils.h"
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static inline HVX_Vector hvx_vec_exp_fp32_guard(HVX_Vector in_vec) {
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static const float kInf = INFINITY;
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static const float kMaxExp = 88.02f; // log(INF)
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const HVX_Vector max_exp = hvx_vec_splat_fp32(kMaxExp);
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const HVX_Vector inf = hvx_vec_splat_fp32(kInf);
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const HVX_VectorPred pred0 = Q6_Q_vcmp_gt_VsfVsf(in_vec, max_exp);
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static inline HVX_Vector hvx_vec_exp_fp32_guard(HVX_Vector in_vec, HVX_Vector max_exp, HVX_Vector inf) {
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const HVX_VectorPred pred0 = Q6_Q_vcmp_gt_VsfVsf(in_vec, max_exp);
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HVX_Vector out = hvx_vec_exp_fp32(in_vec);
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@@ -47,6 +42,12 @@ void hvx_exp_f32(const uint8_t * restrict src, uint8_t * restrict dst, const int
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HVX_Vector vec_out = Q6_V_vzero();
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static const float kInf = INFINITY;
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static const float kMaxExp = 88.02f; // log(INF)
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const HVX_Vector max_exp = hvx_vec_splat_fp32(kMaxExp);
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const HVX_Vector inf = hvx_vec_splat_fp32(kInf);
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if (0 == unaligned_loop) {
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HVX_Vector * p_vec_in1 = (HVX_Vector *) src;
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HVX_Vector * p_vec_out = (HVX_Vector *) dst;
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@@ -55,9 +56,9 @@ void hvx_exp_f32(const uint8_t * restrict src, uint8_t * restrict dst, const int
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for (int i = 0; i < num_elems_whole; i += VLEN_FP32) {
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if (true == negate) {
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HVX_Vector neg_vec_in = hvx_vec_neg_fp32(*p_vec_in1++);
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*p_vec_out++ = hvx_vec_exp_fp32_guard(neg_vec_in);
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*p_vec_out++ = hvx_vec_exp_fp32_guard(neg_vec_in, max_exp, inf);
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} else {
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*p_vec_out++ = hvx_vec_exp_fp32_guard(*p_vec_in1++);
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*p_vec_out++ = hvx_vec_exp_fp32_guard(*p_vec_in1++, max_exp, inf);
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}
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}
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} else {
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@@ -67,9 +68,9 @@ void hvx_exp_f32(const uint8_t * restrict src, uint8_t * restrict dst, const int
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if (true == negate) {
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HVX_Vector neg_vec_in = hvx_vec_neg_fp32(in);
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*(HVX_UVector *) (dst + i * SIZEOF_FP32) = hvx_vec_exp_fp32_guard(neg_vec_in);
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*(HVX_UVector *) (dst + i * SIZEOF_FP32) = hvx_vec_exp_fp32_guard(neg_vec_in, max_exp, inf);
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} else {
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*(HVX_UVector *) (dst + i * SIZEOF_FP32) = hvx_vec_exp_fp32_guard(in);
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*(HVX_UVector *) (dst + i * SIZEOF_FP32) = hvx_vec_exp_fp32_guard(in, max_exp, inf);
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}
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}
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}
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@@ -83,9 +84,9 @@ void hvx_exp_f32(const uint8_t * restrict src, uint8_t * restrict dst, const int
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if (true == negate) {
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HVX_Vector neg_vec_in = hvx_vec_neg_fp32(in);
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vec_out = hvx_vec_exp_fp32_guard(neg_vec_in);
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vec_out = hvx_vec_exp_fp32_guard(neg_vec_in, max_exp, inf);
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} else {
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vec_out = hvx_vec_exp_fp32_guard(in);
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vec_out = hvx_vec_exp_fp32_guard(in, max_exp, inf);
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}
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hvx_vec_store_u((void *) dstf, left_over * SIZEOF_FP32, vec_out);
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@@ -16,6 +16,15 @@
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#include "hvx-utils.h"
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#include "ops-utils.h"
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static inline HVX_Vector hvx_vec_inverse_fp32_guard(HVX_Vector v_sf, HVX_Vector nan_inf_mask) {
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HVX_Vector out = hvx_vec_inverse_fp32(v_sf);
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HVX_Vector masked_out = Q6_V_vand_VV(out, nan_inf_mask);
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const HVX_VectorPred pred = Q6_Q_vcmp_eq_VwVw(nan_inf_mask, masked_out);
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return Q6_V_vmux_QVV(pred, Q6_V_vzero(), out);
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}
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void hvx_inverse_f32(const uint8_t * restrict src, uint8_t * restrict dst, const int num_elems) {
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int left_over = num_elems & (VLEN_FP32 - 1);
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int num_elems_whole = num_elems - left_over;
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@@ -32,19 +41,22 @@ void hvx_inverse_f32(const uint8_t * restrict src, uint8_t * restrict dst, const
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FARF(HIGH, "hvx_inverse_f32: unaligned loop in hvx op, possibly slower execution\n");
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}
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static const uint32_t kNanInfMask = 0x7f800000;
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const HVX_Vector nan_inf_mask = Q6_V_vsplat_R(kNanInfMask);
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if (0 == unaligned_loop) {
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HVX_Vector * p_vec_in = (HVX_Vector *) src;
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HVX_Vector * p_vec_out = (HVX_Vector *) dst;
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#pragma unroll(4)
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for (int i = 0; i < num_elems_whole; i += VLEN_FP32) {
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*p_vec_out++ = hvx_vec_inverse_fp32_guard(*p_vec_in++);
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*p_vec_out++ = hvx_vec_inverse_fp32_guard(*p_vec_in++, nan_inf_mask);
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}
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} else {
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#pragma unroll(4)
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for (int i = 0; i < num_elems_whole; i += VLEN_FP32) {
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HVX_Vector in = *(HVX_UVector *) (src + i * SIZEOF_FP32);
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*(HVX_UVector *) (dst + i * SIZEOF_FP32) = hvx_vec_inverse_fp32_guard(in);
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*(HVX_UVector *) (dst + i * SIZEOF_FP32) = hvx_vec_inverse_fp32_guard(in, nan_inf_mask);
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}
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}
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@@ -53,7 +65,7 @@ void hvx_inverse_f32(const uint8_t * restrict src, uint8_t * restrict dst, const
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float * dstf = (float *) dst + num_elems_whole;
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HVX_Vector in = *(HVX_UVector *) srcf;
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HVX_Vector out = hvx_vec_inverse_fp32_guard(in);
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HVX_Vector out = hvx_vec_inverse_fp32_guard(in, nan_inf_mask);
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hvx_vec_store_u((void *) dstf, left_over * SIZEOF_FP32, out);
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}
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@@ -726,24 +726,6 @@ static inline HVX_Vector hvx_vec_inverse_fp32(HVX_Vector v_sf) {
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return Q6_Vsf_equals_Vqf32(r_qf);
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}
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static inline HVX_Vector hvx_vec_inverse_fp32_guard(HVX_Vector v_sf) {
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static const float kInf = INFINITY;
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static const uint32_t kNanMask = 0x7fffffff;
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static const uint32_t kNanMin = 0x7f800000;
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const HVX_Vector inf = hvx_vec_splat_fp32(kInf);
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const HVX_VectorPred pred_inf = Q6_Q_vcmp_gt_VsfVsf(inf, v_sf);
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HVX_Vector out = hvx_vec_inverse_fp32(v_sf);
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const HVX_Vector nan_mask = Q6_V_vsplat_R(kNanMask);
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const HVX_Vector nan_min = Q6_V_vsplat_R(kNanMin);
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HVX_Vector masked_out = Q6_V_vand_VV(out, nan_mask);
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const HVX_VectorPred pred = Q6_Q_vcmp_gtand_QVuwVuw(pred_inf, nan_min, masked_out);
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return Q6_V_vmux_QVV(pred, out, Q6_V_vzero());
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}
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#define FAST_SIGMOID_LOG2F (0x3fb8aa3b) // 1.442695022
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#define FAST_SIGMOID_C1 (0x3d009076) // 0.03138777
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#define FAST_SIGMOID_C2 (0x3e8d74bd) // 0.276281267
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@@ -958,14 +940,16 @@ static inline HVX_Vector hvx_vec_rsqrt_fp32(HVX_Vector in_vec) {
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return Q6_Vsf_equals_Vqf32(temp);
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}
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static inline HVX_Vector hvx_vec_fast_sigmoid_fp32_guard(HVX_Vector v) {
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static const float kMaxExp = -88.02f; // log(INF)
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const HVX_Vector max_exp = Q6_V_vsplat_R(*((uint32_t *) &kMaxExp));
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const HVX_VectorPred pred_inf = Q6_Q_vcmp_gt_VsfVsf(v, max_exp);
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static inline HVX_Vector hvx_vec_fast_sigmoid_fp32_guard(HVX_Vector v,
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HVX_Vector one,
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HVX_Vector max_exp,
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HVX_Vector min_exp) {
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const HVX_VectorPred pred_max = Q6_Q_vcmp_gt_VsfVsf(max_exp, v);
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const HVX_VectorPred pred_min = Q6_Q_vcmp_gt_VsfVsf(v, min_exp);
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HVX_Vector out = hvx_vec_fast_sigmoid_fp32(v);
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return Q6_V_vmux_QVV(pred_inf, out, Q6_V_vzero());
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out = Q6_V_vmux_QVV(pred_max, out, one);
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return Q6_V_vmux_QVV(pred_min, out, Q6_V_vzero());
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}
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static inline void hvx_fast_sigmoid_f32(const uint8_t * restrict src, uint8_t * restrict dst, const int num_elems) {
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@@ -977,9 +961,16 @@ static inline void hvx_fast_sigmoid_f32(const uint8_t * restrict src, uint8_t *
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const HVX_Vector * restrict v_src = (HVX_Vector *) src;
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HVX_Vector * restrict v_dst = (HVX_Vector *) dst;
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static const float kMinExp = -87.f; // 0
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static const float kMaxExp = 87.f; // 1
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const HVX_Vector one = hvx_vec_splat_fp32(1.f);
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const HVX_Vector max_exp = hvx_vec_splat_fp32(kMaxExp);
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const HVX_Vector min_exp = hvx_vec_splat_fp32(kMinExp);
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#pragma unroll(4)
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for (int i = 0; i < step_of_1; i++) {
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v_dst[i] = hvx_vec_fast_sigmoid_fp32_guard(v_src[i]);
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v_dst[i] = hvx_vec_fast_sigmoid_fp32_guard(v_src[i], one, max_exp, min_exp);
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}
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}
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